1118 - 積體電路佈局設計與實務
Design and Practice of Integrated Circuit Layout
教育目標 Course Target
本課程將介紹layout(佈局)和先進製程的密切關係,從佈局設計流程之基本觀念及 EDA 軟體的使用到更深入探討 layout 的架構設計和先進製程中layout遇到的瓶頸和困難;課程內將教授並探討不同實務架構的layout問題和解決方法,其中包含標準電路元件(Standard cell)、記憶(Memory) 、類比暨混合信號 (Analog and mixed signal),最後透過本課程的期末報告練習,可了解實務界中layout design的挑戰和對未來先進製程的重要性並提升學生往後在業界的競爭力
This course will introduce the close relationship between layout and advanced processes, from the basic concepts of the layout design process and the use of EDA software to a more in-depth discussion of the architectural design of layout and the bottlenecks and difficulties encountered by layout in advanced processes. The course will teach and discuss layout problems and solutions for different practical architectures, including standard circuit elements (Standard cell), memory (Memory), analog and mixed signal (Analog and mixed signal) signal). Finally, through the final report exercise of this course, students can understand the challenges of layout design in the practical world and the importance of future advanced processes, and enhance students' future competitiveness in the industry.
參考書目 Reference Books
自篇講義
Self-written lecture notes
評分方式 Grading
評分項目 Grading Method |
配分比例 Percentage |
說明 Description |
---|---|---|
作業成績 Homework results |
40 | |
期中考 midterm exam |
25 | |
期末考 final exam |
25 | |
實務課程自主學習 Independent study of practical courses |
10 |
授課大綱 Course Plan
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課程資訊 Course Information
基本資料 Basic Information
- 課程代碼 Course Code: 1118
- 學分 Credit: 0-3
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上課時間 Course Time:Tuesday/5,6,7[HT108]
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授課教師 Teacher:翁峻鴻
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修課班級 Class:電機系3,4
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