1047 - 硬體描述語言 Hardware Description Language

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教育目標 Course Target

1. Understanding advanced Verilog HDL. 2. Use Verilog HDL to design and simulate digital systems.1. Understanding advanced Verilog HDL. 2. Use Verilog HDL to design and simulate digital systems.

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課程概述 Course Description

This course is an extension of Digital Systems. A logical progression of Verilog HDL-based topics will be introduced.
This course is an extension of Digital Systems. A logical progression of Verilog HDL-based topics will be introduced.

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參考書目 Reference Books

1. Verilog HDL, 2nd ed, Samir Palnitkar, Prentice Hall, 2003
2. Digital Design, 6th ed. by M. Mano Prentice-Hall, 2018
3. Advanced Digital Design with the Verilog HDL, 2nd ed, Michael D. Ciletti, Pearson, 2010.
4. Verilog 硬體描述語言 (Verilog HDL: A Guide to Digital Design and Synthesis, 2/e), 黃英叡、黃稚存, 全華, 2005
1. Verilog HDL, 2nd ed, Samir Palnitkar, Prentice Hall, 2003
2. Digital Design, 6th ed. by M. Mano Prentice-Hall, 2018
3. Advanced Digital Design with the Verilog HDL, 2nd ed, Michael D. Ciletti, Pearson, 2010.
4. Verilog Hardware Description Language (Verilog HDL: A Guide to Digital Design and Synthesis, 2/e), Huang Ying, Huang Zhicun, Quanhua, 2005

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評分方式 Grading

評分項目 Grading Method	配分比例 Grading percentage	說明 Description
HomeworkHomework Homework	30
Midterm examsMidterm exams Midterm exams	30
Final examFinal exam Final exam	25
Attendance and participationAttendance and participation Attendance and participation	15

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授課大綱 Course Plan

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