Home
資訊工程學系
course information of 104 - 2 | 1146 Hardware Description Language Design(硬體描述語言設計與模擬)

Taught In English1146 - 硬體描述語言設計與模擬 Hardware Description Language Design


教育目標 Course Target

1. Understanding advanced Verilog HDL. 2. Use Verilog HDL to design and simulate digital systems.1. understanding advanced Verilog HDL. 2. use Verilog HDL to design and simulate digital systems.


課程概述 Course Description

This course is an extension of Digital Systems. A logical progression of Verilog HDL-based topics will be introduced.
this course i San extension of digital systems. A logical progression of Verilog HDL-base topics will be introduced.


參考書目 Reference Books

1. Verilog HDL, 2nd ed, Samir Palnitkar, SunSoft Press, 2003.
2. Digital Design, 5th ed. by M. Mano Prentice-Hall.
3. Advanced Digital Design with the Verilog HDL, 2nd ed, Michael D. Ciletti, Peasrson, 2010.
1. Verilog HDL, 2nd ed, Samir Palnitkar, SunSoft Press, 2003.
2. Digital Design, 5th ed. by M. Mano Prentice-Hall.
3. Advanced Digital Design with the Verilog HDL, 2nd ed, Michael D. Ciletti, Peasrson, 2010.


評分方式 Grading

評分項目 Grading Method 配分比例 Grading percentage 說明 Description
HomeworkHomework
homework
30
Midterm examsMidterm exams
midterm exams
30
Final examFinal exam
final exam
25
Attendance and participationAttendance and participation
attendance and participation
15

授課大綱 Course Plan

Click here to open the course plan. Course Plan
交換生/外籍生選課登記 - 請點選下方按鈕加入登記清單,再等候任課教師審核。
Add this class to your wishlist by click the button below.
請先登入才能進行選課登記 Please login first


相似課程 Related Course

很抱歉,沒有符合條件的課程。 Sorry , no courses found.

Course Information

Description

學分 Credit:0-3
上課時間 Course Time:Thursday/4[C118] Wednesday/1,2[C119]
授課教師 Teacher:廖啟賢
修課班級 Class:資工系資電組2
選課備註 Memo:
This Course is taught In English 授課大綱 Course Plan: Open

選課狀態 Attendance

There're now 65 person in the class.
目前選課人數為 65 人。

請先登入才能進行選課登記 Please login first